Python unicorn.arm_const() Examples

The following are 8 code examples of unicorn.arm_const(). You can vote up the ones you like or vote down the ones you don't like, and go to the original project or source file by following the links above each example. You may also want to check out all available functions/classes of the module unicorn , or try the search function .
Example #1
Source File: qemu.py    From Sibyl with GNU General Public License v3.0 6 votes vote down vote up 
def __init__(self, *args, **kwargs):
        import unicorn.arm_const as csts
        self.regs = {
            'CPSR': csts.UC_ARM_REG_CPSR, 'SPSR': csts.UC_ARM_REG_SPSR,
            'R4': csts.UC_ARM_REG_R4, 'R5': csts.UC_ARM_REG_R5,
            'R6': csts.UC_ARM_REG_R6, 'R1': csts.UC_ARM_REG_R1,
            'R7': csts.UC_ARM_REG_R7, 'R0': csts.UC_ARM_REG_R0,
            'R2': csts.UC_ARM_REG_R2, 'R3': csts.UC_ARM_REG_R3,
            'R8': csts.UC_ARM_REG_R8, 'R15': csts.UC_ARM_REG_R15,
            'R9': csts.UC_ARM_REG_R9, 'R14': csts.UC_ARM_REG_R14,
            'R12': csts.UC_ARM_REG_R12, 'R13': csts.UC_ARM_REG_R13,
            'R10': csts.UC_ARM_REG_R10, 'SL': csts.UC_ARM_REG_SL,
            'R11': csts.UC_ARM_REG_R11, 'SP': csts.UC_ARM_REG_SP,
            'SB': csts.UC_ARM_REG_SB, 'LR': csts.UC_ARM_REG_LR,
        }
        self.pc_reg_name = "PC"
        self.pc_reg_value = csts.UC_ARM_REG_PC
        super(UcWrapCPU_arml, self).__init__(*args, **kwargs)
Example #2
Source File: qemu.py    From Sibyl with GNU General Public License v3.0 6 votes vote down vote up 
def __init__(self, *args, **kwargs):
        import unicorn.arm_const as csts
        self.regs = {
            'CPSR': csts.UC_ARM_REG_CPSR, 'SPSR': csts.UC_ARM_REG_SPSR,
            'R4': csts.UC_ARM_REG_R4, 'R5': csts.UC_ARM_REG_R5,
            'R6': csts.UC_ARM_REG_R6, 'R1': csts.UC_ARM_REG_R1,
            'R7': csts.UC_ARM_REG_R7, 'R0': csts.UC_ARM_REG_R0,
            'R2': csts.UC_ARM_REG_R2, 'R3': csts.UC_ARM_REG_R3,
            'R8': csts.UC_ARM_REG_R8, 'R15': csts.UC_ARM_REG_R15,
            'R9': csts.UC_ARM_REG_R9, 'R14': csts.UC_ARM_REG_R14,
            'R12': csts.UC_ARM_REG_R12, 'R13': csts.UC_ARM_REG_R13,
            'R10': csts.UC_ARM_REG_R10, 'SL': csts.UC_ARM_REG_SL,
            'R11': csts.UC_ARM_REG_R11, 'SP': csts.UC_ARM_REG_SP,
            'SB': csts.UC_ARM_REG_SB, 'LR': csts.UC_ARM_REG_LR,
        }
        self.pc_reg_name = "PC"
        self.pc_reg_value = csts.UC_ARM_REG_PC
        super(UcWrapCPU_armtl, self).__init__(*args, **kwargs)
Example #3
Source File: emulator.py    From cemu with MIT License 6 votes vote down vote up 
def unicorn_register(self, reg):
        curarch = self.parent.arch
        if is_x86(curarch):
            return getattr(unicorn.x86_const, "UC_X86_REG_%s"%reg.upper())

        if is_arm(curarch) or is_arm_thumb(curarch):
            return getattr(unicorn.arm_const, "UC_ARM_REG_%s"%reg.upper())

        if is_aarch64(curarch):
            return getattr(unicorn.arm64_const, "UC_ARM64_REG_%s"%reg.upper())

        # if is_ppc(curarch):
        #     return getattr(unicorn.ppc_const, "UC_PPC_REG_%s" % reg.upper())

        if is_mips(curarch) or is_mips64(curarch):
            return getattr(unicorn.mips_const, "UC_MIPS_REG_%s" % reg.upper())

        if is_sparc(curarch) or is_sparc64(curarch):
            return getattr(unicorn.sparc_const, "UC_SPARC_REG_%s" %reg.upper())

        raise Exception("Cannot find register '%s' for arch '%s'" % (reg, curarch))
Example #4
Source File: arm.py    From rainbow with GNU Lesser General Public License v3.0 6 votes vote down vote up 
def __init__(self, trace=True, sca_mode=False, local_vars={}):
        super().__init__(trace, sca_mode)
        self.emu = uc.Uc(uc.UC_ARCH_ARM, uc.UC_MODE_ARM)
        self.disasm = cs.Cs(cs.CS_ARCH_ARM, cs.CS_MODE_ARM | cs.CS_MODE_THUMB)
        self.disasm.detail = True
        self.word_size = 4
        self.endianness = "little"
        self.page_size = self.emu.query(uc.UC_QUERY_PAGE_SIZE)
        self.page_shift = self.page_size.bit_length() - 1
        self.pc = uc.arm_const.UC_ARM_REG_PC

        known_regs = [i[len('UC_ARM_REG_'):] for i in dir(uc.arm_const) if '_REG' in i]
        self.reg_map = {r.lower(): getattr(uc.arm_const, 'UC_ARM_REG_'+r) for r in known_regs}

        self.stubbed_functions = local_vars
        self.setup(sca_mode)
    
        self.reset_stack()
Example #5
Source File: cortexm.py    From rainbow with GNU Lesser General Public License v3.0 6 votes vote down vote up 
def __init__(self, trace=True, sca_mode=False, local_vars={}):
        super().__init__(trace, sca_mode)
        self.emu = uc.Uc(uc.UC_ARCH_ARM, uc.UC_MODE_THUMB | uc.UC_MODE_MCLASS)
        self.disasm = cs.Cs(cs.CS_ARCH_ARM, cs.CS_MODE_THUMB | cs.CS_MODE_MCLASS)
        self.disasm.detail = True
        self.word_size = 4
        self.endianness = "little"
        self.page_size = self.emu.query(uc.UC_QUERY_PAGE_SIZE)
        self.page_shift = self.page_size.bit_length() - 1
        self.pc = uc.arm_const.UC_ARM_REG_PC

        known_regs = [i[len('UC_ARM_REG_'):] for i in dir(uc.arm_const) if '_REG' in i]
        self.reg_map = {r.lower(): getattr(uc.arm_const, 'UC_ARM_REG_'+r) for r in known_regs}

        self.stubbed_functions = local_vars
        self.setup(sca_mode)

        self.reset_stack()
        # Force mapping of those addresses so that
        # exception returns can be caught in the base
        # block hook rather than a code fetch hook
        self.map_space(0xfffffff0, 0xffffffff)

        self.emu.hook_add(uc.UC_HOOK_INTR, self.intr_hook)
Example #6
Source File: arm.py    From rainbow with GNU Lesser General Public License v3.0 5 votes vote down vote up 
def reset_stack(self):
        self.emu.reg_write(uc.arm_const.UC_ARM_REG_SP, self.STACK_ADDR)
Example #7
Source File: cortexm.py    From rainbow with GNU Lesser General Public License v3.0 5 votes vote down vote up 
def reset_stack(self):
        self.emu.reg_write(uc.arm_const.UC_ARM_REG_SP, self.STACK_ADDR)
Example #8
Source File: gdb_tools.py    From bootloader_instrumentation_suite with MIT License 5 votes vote down vote up 
def _do_import(self):
        if not self._import_done:
            self._import_done = True
            global Main
            if not self.run_standalone:
                from config import Main
            global substage
            global doit_manager
            global substage
            global staticanalysis
            global ia
            global pure_utils
            global db_info
            global utils
            global unicorn_utils
            global unicorn
            global uniarm
            global capstone
            global caparm
            global r2
            import unicorn
            import unicorn.arm_const as uniarm
            import capstone
            import capstone.arm as caparm
            import r2_keeper as r2
            import ia
            if not self.run_standalone:
                import substage, staticanalysis, doit_manager, db_info
                import testsuite_utils as utils
            import pure_utils
            import unicorn_utils
            if not self.run_standalone:
                self.cc = Main.cc
                self.stage_order = [Main.stages[0]]  # default is first stage only
                self._stages = {s.stagename: TargetStageData(s, self.bp_hooks)
                                for s in Main.stages}
            else:
                self.cc = "gcc"
                self.stages = {}
                self.stage_order = ["local"]
            self.ia = ia.InstructionAnalyzer()